Diamond软件的使用--(6)访问FPGA的专用SPI接口

1.什么是FPGA的专用SPI接口？

此处的SPI FLASH接口即为FPGA的专用SPI接口，上电时，FPGA从该FLASH读出程序并运行。

2.访问SPI PROM需要注意哪些地方？

1）处于MASTER SPI MODE

2）调用USRMCLK原语，使用时序逻辑配置USRMCLKTS,

     上电过程中先是高，然后PLL的lock锁定后几个时钟再把这个信号拉低。

3）将CONEIG IOVOLTAGE设置为3.3

3.USRMCLK原语说明

查看数据手册<<ECP5 and ECP5-5G sysCONFIG User Guide>>可知，通过调用原语USRMCLK

将切换SPI接口的MCLK引脚时钟源。
 

module top(
 //System interface 
    input             rst_n,
    input             sys_clk,

 //Flash interface                  

    input             spi_miso,
    output            spi_mosi,
    output            spi_cs_n   

);
    wire              clk_flash;
    wire              pll_locked;
    reg               pll_locked_ff1;
    reg               pll_locked_ff2;
    reg               spi_clk_en;

 pll_sys u_pll_sys(
    .CLKI(sys_clk),    //50M
    .CLKOP(clk_flash), //20M
    .LOCK(pll_locked) 
 );

 always @(posedge clk_flash or negedge pll_locked)
 begin
	 if(!pll_locked)begin
		 pll_locked_ff1 <= 1'd0;
		 pll_locked_ff2 <= 1'd0;
	 end
	 else begin
		 pll_locked_ff1 <= pll_locked;
		 pll_locked_ff2 <= pll_locked_ff1;
	  end
 end
 
 always @(posedge clk_flash or negedge pll_locked)
 begin
	 if(!pll_locked)
		   spi_clk_en <= 1'd1;
	 else if(pll_locked_ff2)
		 spi_clk_en <= 1'd0;
	 else;
 end
 
 
 USRMCLK u_USRMCLK(
	 .USRMCLKI(spi_clk),
	 .USRMCLKTS(spi_clk_en) 
 ) /* synthesis syn_noprune=1 */;
 

		
 flash_drive flash_drive_u0(
    .i_clk                  (clk_flash               ),
    .i_rst                  (~rst_n             ),

    .i_operation_type       (w_operation_type   ),
    .i_operation_addr       (w_operation_addr   ),
    .i_operation_num        (w_operation_num    ),
    .i_operation_valid      (w_operation_valid  ),
    .o_operation_ready      (w_operation_ready  ),
    .i_write_data           (w_write_data       ),
    .i_write_sop            (w_write_sop        ),
    .i_write_eop            (w_write_eop        ),
    .i_write_valid          (w_write_valid      ),
    .o_read_data            (w_read_data        ),
    .o_read_sop             (w_read_sop         ),
    .o_read_eop             (w_read_eop         ),
    .o_read_valid           (w_read_valid       ),

    .o_spi_clk              (spi_clk            ),
    .o_spi_cs               (o_spi_cs_n         ),
    .o_spi_mosi             (o_spi_mosi         ),
    .i_spi_miso             (i_spi_miso         )
);

endmodule

4.CONFIG IOVOLTAGE设置